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Instruction set
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#	Item
841	R3081 Mezzanine for VME6U6 Users Manual 15. R3081 Mezzanine The R3081 Mezzanine provides 2 independent MIPS R3081 RISC processors that appear to the host system as two additional resources of the VME6U6. In addition, the Add to Reading List Source URL: www.cacdsp.com Language: English - Date: 1998-02-03 17:01:15 MIPS architecture Central processing unit Coprocessor COFF Booting Digital signal processor Computer architecture MIPS Technologies Instruction set architectures
842	Software Metaphors http://educery.com/papers/rhetoric/metaphors/ Software Metaphors Nik Boyd Add to Reading List Source URL: educery.com Language: English - Date: 2013-12-21 04:26:29 Central processing unit Instruction set Metaphor Conceptual metaphor Computer program Software Code refactoring Subroutine Computing Literature Source code
843	HC17.S2T1 A Milliflow Aggregation Processor.ppt Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:45:43 Computer memory Direct memory access Motherboard Instruction set architectures Microcontrollers 64-bit Embedded microprocessors Blackfin Forwarding plane Computer hardware Computer architecture Computing
844	Danville Signal Processing, Inc Add to Reading List Source URL: www.danvillesignal.com Language: English - Date: 2014-08-22 14:57:03 Microcontrollers Embedded systems Digital signal processors Instruction set architectures Non-volatile memory Joint Test Action Group Flash memory Blackfin USB flash drive Computer hardware Computing Computer architecture
845	V810 FAMILYTM 32-BIT MICROPROCESSOR ARCHITECTURE V805TM Add to Reading List Source URL: www.goliathindustries.com Language: English - Date: 2008-01-27 01:39:25 Assembly languages Instruction set Addressing mode Central processing unit INT Zilog Z80 Intel MCS-51 Computer architecture Interrupts Instruction set architectures
846	Gemini: A Power-efficient Chip Multi-Threaded (CMT) UltraSPARC® Processor Sanjiv Kapil Gemini Architect Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:42:23 Microprocessors UltraSPARC III UltraSPARC II Instruction set architectures UltraSPARC T1 UltraSPARC IV SPARC Multi-core processor DIMM Computer hardware Computer architecture Central processing unit
847	A back end table for the Motorola MC68000, MC68010 and MC68020 microprocessors Frank Doodeman ABSTRACT A back end table is part of the Amsterdam Compiler Kit (ACK). It is used Add to Reading List Source URL: tack.sourceforge.net Language: English - Date: 2011-02-11 16:00:24 Central processing unit Instruction set architectures Assembly languages Addressing mode Machine code Motorola 68000 Memory address Processor register 16-bit Computer architecture Computer hardware Computing
848	HotChips 2003 presentation Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:41:45 Instruction set architectures ARM architecture Texas Instruments TMS320 Microcontrollers ARM9 Texas Instruments DaVinci MT6235 Computer architecture Digital signal processors Computer hardware
849	The table driven code generator from the Amsterdam Compiler Kit Second Revised Edition Hans van Staveren Dept. of Mathematics and Computer Science Add to Reading List Source URL: tack.sourceforge.net Language: English - Date: 2011-02-11 16:00:24 Central processing unit Instruction set architectures Assembly languages Processor register Orthogonal instruction set Subroutine Addressing mode Stack Instruction set Computer architecture Computing Computer engineering
850	P55C Micro-Architecture – The First Implementation of the MMXTM Technology Michael Kagan Intel Corporation Israel Design Center Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:47:45 Parallel computing MMX P5 SIMD Pentium 3DNow! Visual Instruction Set Computing X86 instructions Computer architecture

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